Analiza FPGA implementacije bilateralnih algoritama upravljanja za dodirnu teleoperaciju

This paper presents the FPGA implementation of sliding mode control algorithm for bilateral teleoperation, such that, the problem of haptic teleoperation is addressed. The presented study improves haptic fidelity by widening the control bandwidth. For wide control bandwidth, short control periods as well as short sampling periods are required that was achieved by the FPGA. The presented FPGA design methodology applies basic optimization methods in order to meet the required control period as well as the required hardware resource consumption. The circuit specification was performed by the high-level programing language LabVIEW using the fixed-point data type. Hence, short design times for producing the FPGA logic circuit can be achieved. The proposed FPGA-based bilateral teleoperation was validated by master-slave experimental device.Ovaj rad opisuje FPGA implementaciju algoritama upravljanja kliznim režimima za bilateralnu teleoperaciju, pri čemu je opisan problem haptičke teleoperacije. Prikazano istraživanje poboljšava dodirnu pouzdanost proširenjem upravljačkog propusnog pojasa. Za široki propusni pojas, potrebni su kratki upravljački periodi i brzo vrijeme uzorkovanja, što je postignuto primjenom FPGA sklopovlja. Prikazana metodologija za projektiranje FPGA sklopovlja koristi osnovne optimizacijske metode s ciljem postizanja potrebnih upravljačkih perioda i zahtijevane fizičke iskorištenosti sklopovlja. Specifikacije sklopovlja su provedene programskim jezikom visoke razine LabVIEW uz korištenje podataka s nepomičnim decimalnim zarezom. Stoga je moguće implementirati traženu logiku na FPGA sklopovlje u kratkom vremenu. Opisana bilateralna teleoperacija temeljena na FPGA slopovlju je testirana na eksperimentalnom postavu s nadre.enim i podre.enim čvorom

FPGA-based Controllers

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Design and implementation of a real time demand side management under intermittent primary energy source conditions with a PV-battery backup system

International audienc

SoC implementation of a photovoltaic reconfiguration algorithm by exploiting a HLS-based architecture

The dynamic reconfiguration of photovoltaic arrays is a promising technique for reducing the power drops due to partial shadowing. Some approaches for determining the optimal electrical configuration of the photovoltaic array have been presented in literature. The most encouraging solution is based on the use of stochastic algorithms that can be fruitfully implemented in a system on chip. The computation time takes profit from the available field programmable gate array fabric, where multiple instances of the fitness function can be run in parallel. The use of Vivado High Level Synthesis, to create a Register Transfer Level implementation from C/C++ sources, allows achieving satisfactory results. Coding the algorithm by taking into account the synthesis process, thus resource allocation, scheduling and binding, helps in obtaining a further performance improvement. In this paper a High Level Synthesis approach is used for the systematic exploration of the possible architectures that can be used for implementing the reconfiguration algorithm. Some solutions that differ in terms of computation time and hardware resources used are compared. The target system on chip is a low cost one from Xilinx

Fixed structure H-inf loop shaping control of switched reluctance motor for electrical vehicle

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Optimal sizing of a residential PV-battery backup for an intermittent primary energy source under realistic constraints

International audienc

Predictive demand side management of a residential house under intermittent primary energy source conditions

International audienc

System-on-chip implementation of a PV dynamical reconfiguration algorithm

Dynamical reconfiguration is receiving attention from the scientific community because of the advantages it can ensure with respect to module-dedicated electronics when partial shadowing of the photovoltaic field occurs. Indeed, lower cost and conversion losses as well as improved diagnostic capabilities make this solution of high interest for industrialization in a near future. Some stochastic algorithms have been proposed recently for determining the best electrical connection among the panels that ensures the highest power production for the actual shadowing pattern. In this paper, no novel reconfiguration algorithm is proposed, but the optimized implementation of one of such recently proposed approaches is described. The advantages achieved by using a system-on-chip platform, through a suitable exploitation of the features it offers, are highlighted. The experimental results confirm that the use of a system-on-chip platform gives significant benefits for the proposed application. Indeed the parallelization of the algorithm allows to reduce the execution time greatly with respect to what can be achieved through a standard software implementation

FPGA based implementation of a sliding-mode observer for battery state of charge estimation

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